1. Field of the Invention
The present invention relates to a thin film transistor and a flat panel display including the same, and more particularly, to a thin film transistor with low contact resistance and a flat panel display including the same.
2. Discussion of the Background
Flat panel displays, such as liquid crystal display devices, organic and inorganic light emitting devices, etc., include many thin film transistors (TFTs). Generally, the TFTs function as a switching device, which turns a pixel on and off, and a driving device, which drives the pixel to emit light.
Each TFT may include a semiconductor layer, a gate electrode, and source and drain electrodes. The semiconductor layer includes source and drain regions, doped with high-concentration impurities, and a channel region interposed between the source and drain regions. The gate electrode is insulated from the semiconductor layer, and it may be located over the channel region. The source and drain electrodes are coupled with the source and drain regions, respectively.
However, the source and drain electrodes usually comprise a low work function metal to allow a smooth flow of electric charges. Consequently, a region where the low work function metal contacts the semiconductor layer may have a high contact resistance, thereby deteriorating the display device's characteristics and increasing its power consumption.
Therefore, various methods have been used to lower the contact resistance between a metal and a semiconductor layer. For example, when a semiconductor layer comprises amorphous silicon, an n+silicon layer may be interposed between the amorphous silicon and the metal source and drain electrodes to facilitate electron or hole migration. When a semiconductor layer comprises polysilicon, the polysilicon may be doped to improve the contact resistance between the metal and the semiconductor layer.
However, manufacturing such TFTs requires temperatures of at least 300° C. Hence, a plastic substrate, which is susceptible to heating, cannot be used.
Recent flat panel displays are being made thin and flexible.
In order to achieve this flexibility, the displays are typically manufactured using a plastic substrate instead of a conventional glass substrate. However, with plastic substrates, the manufacturing process must be performed at a low temperature. Therefore, a conventional polysilicon TFT may not be used.
To overcome this problem, a TFT including an organic semiconductor may be used, instead of the polysilicon TFT, because the organic semiconductor layer may be manufactured at low temperature.
However, a TFT including an organic semiconductor may have high contact resistance in a region where the organic semiconductor material contacts the metal source and drain electrodes. This contact resistance may be reduced using various methods. For example, a top portion of a gate insulating layer or a protecting layer, which is adjacent to an organic semiconductor layer, may be treated using self assembled monolayer (SAM) comprising a compound such as octadecyltrichlorosilane (OTS), hexamethyldisilazane (HMDS) etc., or it may be coated with a fluoride-containing polymer or a conventional polymer. For example, Korean Patent Laid-open Publication No. 2003-0085592 discloses a TFT including a doped channel adjacent to source and drain electrodes. In this case, first, a dopant is injected into the source and drain electrodes, and portions of a channel that is adjacent to the source and drain electrodes are exposed.
However, because this method may not acceptably reduce the contact resistance, there is a need to further decrease the contact resistance.